[SOLVED]  ECE2220 Lab3- Binary Code Decimal, Hexadecimal Number Representation

Description

In this lab the seven segment display (SSD) will be used to output the results of a 4-bit binary word in hexadecimal and then binary coded decimal output. A binary-coded-decimal (BCD) or a hexadecimal to SSD converter display is simply a combinational circuit with 4 binary inputs and 7 outputs. The 4-bit input is the BCD representation of digits 0-9 and the hexadecimal representation of digits 0-F and the. The 7-bit output is the state of each of SSD segments as shown in see in the figure below. Note the representation of some digits like 1, 6, and 9 might be different from one decoder to another.

Seven-segment displays (SSD) are commonly found on computers, watches, VCRs, and other electronic devices to display numbers and characters. The seven-segment displays in the lab consist of seven Light Emitting Diodes (LEDs) in the configuration of a number “8”. Different segments can be illuminated to display different numbers and letters. The segments of a seven-segment display are illustrated in the figure below. The SSDs, in general, come in packages with either a common anode or a common cathode. The SSDs on the DE10 board are common-anode. In this format the LED turns on with negative logic – i.e. low.

Binary Code Decimal, Hexadecimal Number Representation

 

• Instructions

Take a 4 bit input from the switches SW[3], SW[2], SW[1], and SW[0]. Display the binary number as a BCD number on right most seven segment display HEX[0]. If the binary input number is greater than 9, the letter E should be displayed.

1. Create a truth table and Karnaugh maps for the BCD-seven segment display

 

 

Decimal	BCD – input switches						Segment
	s3	s2	s1	s0	a	b	c	d	e	f	g
0	0	0	0	0
1	0	0	0	1
2	0	0	1	0
3	0	0	1	1
4	0	1	0	0
5	0	1	0	1
6	0	1	1	0
7	0	1	1	1
8	1	0	0	0
9	1	0	0	1
10	1	0	1	0
11	1	0	1	1
12	1	1	0	0
13	1	1	0	1
14	1	1	1	0
15	1	1	1	1

 

 

 

 

 

 

 

 

 

 

a          s₁ s₀                                                      b          s₁ s₀

s₃ s₂       00           01           11          10           s₃ s₂       00           01           11           10

• 00
• 01

11 11

10 10

𝑎𝑎 = ______________________________                  𝑏𝑏 = ______________________________

c          s₁ s₀                                                      d          s₁ s₀

s₃ s₂       00           01           11          10           s₃ s₂       00           01           11          10

• 00
• 01

11 11

10 10

𝑐𝑐 = ______________________________                   𝑑𝑑 = ______________________________

e          s₁ s₀                                                      f          s₁ s₀

s₃ s₂       00           01           11          10           s₃ s₂       00           01           11          10

• 0
• 01

11 11

10 10

𝑒𝑒 = ______________________________                   𝑓𝑓 = _______________________________

G s₁ s₀         s₃ s₂ 00 01 11 10

00

01

11

10

𝑔𝑔 = ______________________________

 

 

 

 

1. Create the Verilog code to perform this BCD function and output using simple combinational logic primitives (i.e. AND (&) , OR (|), NOT (~) etc.) Compile your code and download it to the DE-10 board.

 

1. Re-write this code using a “case” statement. Compile your code and download it to the DE-10 board.

 

1. Again using a case statement, re-write the code to display the hexadecimal representations of the input switches. Comment on the two Verilog implementations.